Liquid crystal displays (LCDs) are widely used flat panel display devices. As is well known to those having skill in the art, a liquid crystal display generally includes a pair of spaced apart substrates with liquid crystals therebetween. Arrays of spaced apart data lines and gate lines define an array of pixels. A thin film transistor (TFT) for each pixel is electrically connected to a data line, a gate line and a pixel electrode.
It is known to provide auxiliary gate lines that extend orthogonally between adjacent spaced apart gate lines. A pair of auxiliary gate lines may be provided in each pixel, at opposite ends thereof, so that two gate lines and the two auxiliary gate lines therebetween form a gate ring around the periphery of the pixel. See for example U.S. Pat. Nos. 5,696,566 to Kim et al., 5,686,977 to Kim et al. and 5,517,341 to Kim et al, that are assigned to the Assignee of the present invention.
In the above-described gate ring structure, the gate ring can act as a shading film that prevents light from leaking at the pixel boundary. The gate ring can also function as a storage capacitor since it can be overlapped with the pixel electrode. Unfortunately, however, the storage capacitance of this storage capacitor may be higher than desired and may be difficult to control.
Another liquid crystal display with a ring pixel structure is described in U.S. Pat. No. 5,561,440 to Kitajima et al. entitled "Liquid Crystal Display Device and Driving Method Therefor". In this patent, each pixel can include one or two auxiliary lines that are electrically disconnected (floating) from the gate line, in order to reduce storage capacitance. The auxiliary lines act as a light shading film. Unfortunately, the floating auxiliary lines may generate parasitic capacitance with the pixel electrode and/or the data line. This parasitic capacitance may add to the existing parasitic capacitance in the liquid crystal display. Thus, the total amount of parasitic capacitance between the pixel electrode and the data line may be as follows: ##EQU1## C.sub.sd is the total parasitic capacitance between the pixel electrode and the data line;
C.sub.sf is parasitic capacitance between the pixel electrode and the floating region; PA1 C.sub.df is parasitic capacitance between the data line and the floating region; and PA1 C.sub.ds is parasitic capacitance between the data line and the pixel electrode.
Unfortunately, the added parasitic capacitance may degrade the quality of the displays produced by the liquid crystal display, especially at the boundary of a block of pixels. Moreover, the floating pixel electrode can adversely affect the data voltages that are applied to the pixel, which can also degrade the display quality.